I think I just lost the file, so I'll have to just type it in again. But that will  take some time . ............

Sorry that i was so late in putting this up. Anyway, here is the key to the "mysterious" roman numerals.....
 

Lab 3

    I.   Plots of  V  vs. t   for charging and discharging circuits.

    II.  Plot  of    I   vs.    t    for the discharging circuit. The tricky part if you plot it for charging capacitor is that the current for the charging capacitor is not
                I = Vc/R   but is given by
                I = (Vo - Vc)/R

    III.  Finding the time constants from the computer graphs --
            Here, you had to note that   Vo  is the voltage at time   t = 0 sec.  and  not 10 V
            For most of the computers, it was set to be   Vo   = 9.5 V  ( = the trigger value.)

    IV.   Plotting   V  vs.   t    on the semi-log graph paper  --

    V.   finding the slope of the semi-log graphs --
            Here, the slope is not given by usual       m = (Y2 -  Y1)/(X2 - X1)              but by

m = ( ln Y2  -  ln  Y1 )/(X2 - X1)
 
            Also, the slope has units of  (1/sec) and  thus you can guess (or look up in the manual) that the time constant   is given by   T = (-1/m) .
            (The negative sign because the slope is negative but time constant is positive. )

    VI.   Finding the equivalant capacitance --
              The equivalant capacitance is given from the time constant by   Ceq  =  (T/R).
               This was the experimentally found C.
                But, for each circuit you were either  given the equivlant capacitance     (for circuit  A and B)
                or you could use the appropriate equation for series or parallel combination and calculate it (for circuit C and D).

    VII.   Then you've to compare the experimental value and the theoretical value.

The rest of it was just answering the questions ---

    VIII.   The  graph  of   I vs.   t    for a charging capacitor is expected to look exactly like
                 that for the discharging capacitor.
                 This could be explained in various ways -
                 i) Note that as the capacitor charges,  it takes longer and longer time to charge further,
                which implies that the  current decreases as time goes on and hence the graph will
                look like a downward curve and not a upward curve.
                ii)  The other way is to use the equation used in part II  above.
                     (Now,  as much as you might dislike equations,  they're usually the only infalliable arguments  !!
                       So, there's no escaping math........)

    IX.   There were two things about rates of charging/discharging -
               i) The circuit  for which the time constant is more (that means higher value of cpacitance,)
                   will take more time to charge/discharge as compared to the one with lesser time constant.
                   ( The exam question was just based on this observation.)
                 ii)  The rate of charging simply means the current in the circuit - hence as time passes,
                       the rate of charging/discharging decreases.

    X.   Ha, this is the most difficult one to explain without a graph and with my limited skills of handling html documents, I don't know how to include a graph here.  But, I'll try (and as usual there're two ways) ........
           i) On a semi-log graph, the interval between  ,say, 10-9V was much less that the interval
            between  ,say,  1-2V.    For a discharging capacitor, the time it takes to go from 10V to 9V is
            much less than it takes to go from 2V to 1V. and hence the graph is linear.
             (I know that this is pretty vauge but there is just so much i can do without a graph.)
            ii) What you're really plotting on  a semi-log paper is not V   vs  t  but   ln V    vs.    t
                  and again using the equations in the manual, you can see that the relation between   ln  V   and   t    is linear.